[Libre-soc-bugs] [Bug 418] SPR pipeline formal correctness proof needed

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Sun Sep 6 20:13:59 BST 2020


Luke Kenneth Casson Leighton <lkcl at lkcl.net> changed:

           What    |Removed                     |Added
 total budget (EUR)|250                         |400
  for completion of|                            |
       task and all|                            |
           subtasks|                            |
             Status|RESOLVED                    |IN_PROGRESS
         Resolution|FIXED                       |---
 The list of people|                            |"kc5tja"=350
 who should be paid|                            |"lkcl"=50
     for completing|                            |
   this task, along|                            |
   with the amounts|                            |
     they should be|                            |
       paid, in EUR|                            |

--- Comment #14 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
samuel i'm re-opening this one (and increasing the budget accordingly)
although it is very simple we need the slow SPRs as well as the DEC and TB
SPRs doing (see fu/spr/main_stage.py it's real simple).  the gotcha is
that TBU is a copy of the upper half of the internal TB register.

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