[Libre-soc-bugs] [Bug 484] Write VHDL to expose CR and XER from Microwatt so single-stepping is possible

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Thu Sep 3 08:42:02 BST 2020


Luke Kenneth Casson Leighton <lkcl at lkcl.net> changed:

           What    |Removed                     |Added
  Attachment #99 is|0                           |1
           obsolete|                            |

--- Comment #3 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
Created attachment 100
  --> https://bugs.libre-soc.org/attachment.cgi?id=100&action=edit
compiles (ghdl) version of cr dmi

took 2 minutes to get it to compile, some missing semicolons, missing
keyword "signal", not much.  a diff-of-the-diff will be very instructive.

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