[Libre-soc-bugs] [Bug 517] Define JTAG pins and set up with litex for ulx3s85f

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=517

--- Comment #12 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Cole Poirier from comment #10)
> (In reply to Luke Kenneth Casson Leighton from comment #9)
> > (In reply to Cole Poirier from comment #8)
> > 
> > > I don't fully understand. How do I know which physical pin on the fpga pcb
> > > to plug the jumper into/onto? Which pin number 0 thorugh 27 corresponds to
> > > gpio_0? Or does it actually correspond to B11?
> > 
> > >     Subsignal("p", Pins("B11")),
> > >     Subsignal("n", Pins("C11")),
> > 
> > gpio 0, p == B11.
> > gpio 0, n == C11.
> 
> Which physical pin is B11? They aren't labelled that way, they are labelled
> 0 through 27, no letters.

B11 is the name of one of the FPGA's solder balls directly on the chip's
package, (B row/column 11 column/row). look up the datasheet for your board to
find out the mapping between solder balls and header pins.

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