[Libre-soc-bugs] [Bug 519] Get output from ulx3s serial port to show up in minicom

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=519

--- Comment #11 from Cole Poirier <colepoirier at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #10)
> > Ok committed and pushed. Next question before we can close this bug. Is
> > running
> > `./versa_ecp5.py --load` supposed to show output in the minicom terminal?
> 
> if everything is wired up correctly yes.
> 
> a good test is to run picorv32 litex.  ask  on the #litex freenode channel
> how to do that.

Looks like it's a configuration issue in our setup because I get the following
interactive output in minicom from running: 
`litex-boards/litex_boards/targets$ ./ulx3s.py --load --device LFE5U-85F`

An ideas of what I can do to connect our 'stuff' properly?


```
Welcome to minicom 2.7.1

OPTIONS: I18n 
Compiled on May  6 2018, 08:02:47.
Port /dev/ttyUSB0, 16:19:20

Press CTRL-A Z for help on special keys                 

   Read speed: 10MiB/s                                  

--============== Boot ==================--              
Booting from serial...
Press Q or ESC to abort boot completely.
sL5DdSMmkekro
             Timeout
No boot medium found

--============= Console ================--

litex> 
litex> 
litex> ls
Command not found
litex> halt
Command not found
litex> help

LiteX BIOS, available commands:

flush_l2_cache           - Flush L2 cache
flush_cpu_dcache         - Flush CPU data cache
crc                      - Compute CRC32 of a part of the address space
ident                    - Identifier of the system
help                     - Print this help

serialboot               - Boot from Serial (SFL)
reboot                   - Reboot

mem_speed                - Test memory speed
mem_test                 - Test memory access
mem_copy                 - Copy address space
mem_write                - Write address space
mem_read                 - Read address space

sdram_test               - Test SDRAM


litex> 
```

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