[Libre-soc-bugs] [Bug 238] POWER Compressed Formal Standard writeup

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Tue Nov 24 00:07:51 GMT 2020


https://bugs.libre-soc.org/show_bug.cgi?id=238

--- Comment #77 from Jacob Lifshay <programmerjake at gmail.com> ---
While going through the PowerISA v3.1 spec, I noticed that we can't really use
Primary Opcode 0 for compressed instructions, since Power reserves Primary
Opcode 0 with Extended Opcode 256 to mean "Service Processor Attention", an
instruction implemented by at least POWER8 and POWER9. This means that
processors would have to read a 32-bit instruction to determine if the
instruction was that instruction or not, so we can't redefine it to be a 16-bit
instruction.

If we end up needing a whole primary opcode, we should use Primary Opcode 5
instead, since it doesn't have any already-used encodings.

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