[Libre-soc-bugs] [Bug 199] Layout using coriolis2 main core, 180nm

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=199

--- Comment #45 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
http://www.aholme.co.uk/6502/Main.htm

apparently there is an algorithm called "SubGemini" which solves the
recursive netlist walking issue: finding sub-circuit instances in a
larger circuit.

1. Miles Ohlrich, Carl Ebeling, Eka Ginting and Lisa Sather. "SubGemini:
Identifying Subcircuits Using a Fast Subgraph Isomorphism Algorithm," In
Proceedings of the 30th IEEE/ACM Design Automation Conference, June 1993.

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