[Libre-soc-bugs] [Bug 348] POWER9 SPR pipeline needed

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=348

--- Comment #8 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
commit 67edc3c40a5aba2f2f3328225830e417d5297304 (HEAD -> master)
Author: Luke Kenneth Casson Leighton <lkcl at lkcl.net>
Date:   Mon Aug 31 11:33:10 2020 +0100

    add XER to fastregs and "construct" it in mfspr/mtspr

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