[Libre-soc-bugs] [Bug 450] Create MMU from microwatt mmu.vhdl

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=450

--- Comment #67 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
        with m.If((v.state == State.RADIX_FINISH)
                  | ((v.state == State.RADIX_LOAD_TLB) & r.iside)):

sigh this is really obscure.  & is a bit-operator.  it actually takes
precedence over "==".  therefore you're forced to put brackets round
any "==" or ">" or "<=" etc. tests

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