[libre-riscv-dev] [Bug 272] functions needed in POWER simulator which match 3.0B spec

[bugzilla-daemon at libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=272

--- Comment #10 from Michael Nolan <mtnolan2640 at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #9)
> ... naah :)

> let's leave this one for now.  i'd like to focus on integer initially.

That's what I figured 


> later, we will need a class for SimpleV anyway (so as to be able to change
> bit-widths)
> 
> do you want to do that?  it's basically a class:

I can, sure.

> 
> one other alternative, michael, is just... use Signal.  it's got everything
> needed.

Doing it through signal would mean messing with yield and such wouldn't it?
Unless implementing the class turns out to be very difficult, I'd kinda like to
avoid that

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