[libre-riscv-dev] [Bug 264] New: ISA switch needs to be a privileged operation

bugzilla-daemon at libre-riscv.org bugzilla-daemon at libre-riscv.org
Sun Mar 22 23:19:38 GMT 2020


            Bug ID: 264
           Summary: ISA switch needs to be a privileged operation
           Product: Libre-SOC's first SoC
           Version: unspecified
          Hardware: Other
                OS: Linux
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: Specification
          Assignee: lkcl at lkcl.net
          Reporter: lkcl at lkcl.net
                CC: libre-riscv-dev at lists.libre-riscv.org
   NLnet milestone: ---

we've had a request from the OpenPOWER foundation that ISA switching be a
privileged operation.

this to prevent endusers from mix and matching arbitrary assembler from
multiple compilers and then expecting "vanilla" systems to support the
resultant excruciatingly nauseous binaries.

a privileged operation will allow say a thread to be established by the kernel
with the same memory space as the userspace application but with a different
executable (the 3D shader compiled application)

in particular we have a bit of a problem when it comes to inlining POWER
assembler with SVPrefix: POWER opcodes can be either LE or BE, and
unfortunately it is the TOP 6 bits which specify the opcode.

if they are LE, it is not ok, exactly, to read 32 bits and have the decoder
then work out if the opcode is actually a 16 bit Compressed instruction.

that just doesn't work.  it's "ok" for 48 and 64 bit SVPrefix (just a bit
weird) however for C it most definitely is not.

however for BE it just so happens that those top 6 bits of a 32 bit opcode will
be byte reversed and so will be in the very first byte of an instruction

this kind of mess is also why it should be a privileged op to do the ISA
switch, really.

needs thinking through, properly.

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