[libre-riscv-dev] [Bug 252] New: 3D accelerated opcodes need to be added to the POWER ISA simulator
bugzilla-daemon at libre-riscv.org
bugzilla-daemon at libre-riscv.org
Fri Mar 13 15:36:02 GMT 2020
http://bugs.libre-riscv.org/show_bug.cgi?id=252
Bug ID: 252
Summary: 3D accelerated opcodes need to be added to the POWER
ISA simulator
Product: Libre Shakti M-Class
Version: unspecified
Hardware: PC
OS: Linux
Status: CONFIRMED
Severity: enhancement
Priority: ---
Component: Source Code
Assignee: lkcl at lkcl.net
Reporter: lkcl at lkcl.net
CC: libre-riscv-dev at lists.libre-riscv.org
NLnet milestone: ---
adding iterated support for 3D opcodes to ISA Simulator (and unit tests) is
needed. likely to be added to gem5.
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