[libre-riscv-dev] [Bug 250] New: Wishbone B4 Streaming Formal correctness proof needed

bugzilla-daemon at libre-riscv.org bugzilla-daemon at libre-riscv.org
Fri Mar 13 15:20:36 GMT 2020


http://bugs.libre-riscv.org/show_bug.cgi?id=250

            Bug ID: 250
           Summary: Wishbone B4 Streaming Formal correctness proof needed
           Product: Libre Shakti M-Class
           Version: unspecified
          Hardware: PC
                OS: Linux
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: Formal Verification
          Assignee: lkcl at lkcl.net
          Reporter: lkcl at lkcl.net
                CC: libre-riscv-dev at lists.libre-riscv.org
   NLnet milestone: ---

Design unit tests as formal proofs in nmigen which can test both nmigen and
(System-)Verilog Wishbone B4 Streaming Bus Function Models.  Example peripheral
(I2S Audio Streaming) to also be tested.

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