[libre-riscv-dev] [Bug 215] evaluate minerva for base in libre-soc

bugzilla-daemon at libre-riscv.org bugzilla-daemon at libre-riscv.org
Wed Mar 11 15:37:46 GMT 2020


--- Comment #4 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #3)
> do note that compressed texture decoding needs to be able to load 128-bit
> wide values (a single compressed texture block), 


> so our scheduling circuitry
> should be designed to support that. They should always be aligned, so we
> won't need to worry about that in the realignment network.


so that's 128-bit-wide for _textures_... that's on the *load* side.  are there
any simultaneous (overlapping) "store" requirements? are the code-loops tight
enough to require simultaneous 128-bit LD *and* 128-bit ST?

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