[libre-riscv-dev] [Bug 211] New: formal proof of PowerDecoder stage2 needed

bugzilla-daemon at libre-riscv.org bugzilla-daemon at libre-riscv.org
Mon Mar 9 12:30:28 GMT 2020


http://bugs.libre-riscv.org/show_bug.cgi?id=211

            Bug ID: 211
           Summary: formal proof of PowerDecoder stage2 needed
           Product: Libre Shakti M-Class
           Version: unspecified
          Hardware: PC
                OS: Linux
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: Formal Verification
          Assignee: lkcl at lkcl.net
          Reporter: lkcl at lkcl.net
                CC: libre-riscv-dev at lists.libre-riscv.org
   NLnet milestone: ---

using the power_fields.py field decoder *in combination* with the
csv decoder, formally prove that the decoder generates correct bitfield
decoders for all fields for all opcodes, in power_decoder2.py.
also critical to ensure that anything not covered is correctly registered
as "illegal opcode".

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