[libre-riscv-dev] Google Funding TSMC Tapeout

Luke Kenneth Casson Leighton lkcl at lkcl.net
Thu Mar 5 16:06:06 GMT 2020

On Thu, Mar 5, 2020 at 3:54 PM Staf Verhaegen <staf at fibraservi.eu> wrote:
> Immanuel, Yehowshua U schreef op do 05-03-2020 om 13:17 [+0000]:
> > Hello Staf,
> Hello Immanuel, rearranged the mail a little.

appreciated the reply, staf.

> I've seen he goal of having a 28nm libre-SOC and I am kind of skeptical.
> I'm coming from the industry and doing something in these smaller nodes is very capital intensive.

that's what immanuel is helping to do.  through Georgia Tech he has
access to the CREATE-X Programme, and one of their Alumni (whom i've
been in touch with for a couple of years) is an entrepreneur and
millionaire whom we will be talking to next week, to get LibreSOC into
shape to approach VCs in Atlanta.

the 180nm ASIC is therefore a stepping-stone which will allow us to
demonstrate a working design (beyond an FPGA) and thus not waste large
amounts of money when it gets to smaller geometries.

hence why immanuel is interested to know how we're able to get to 180nm.


More information about the libre-riscv-dev mailing list