[libre-riscv-dev] daily kan-ban update 12jul2020

[Luke Kenneth Casson Leighton]

tasks:
https://bugs.libre-soc.org/showdependencytree.cgi?maxdepth=1&id=383&hide_resolved=1

yesterday:

* big addition of bigendian flag throughout code (qemu, ISACaller, tests)
* started running helloworld.bin again

today:

* fixed simple bug in PowerDecoder2, OP_B was not setting LR register write
* added LD/ST cacheing-inhibit instructions

so that's enough to get helloworld "operational" as far as running
without a UART peripheral is concerned.  the next stage will be to
drop a UART peripheral (simulated or otherwise) onto the memory bus.
these are what the ld/st cache-inhibit instructions are supposed to be
used for, to access the peripheral at address 0xc0000000.

l.

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