[libre-riscv-dev] [Bug 189] Create partitioned right shift using the existing partitioned left shift

[bugzilla-daemon at libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=189

--- Comment #6 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Michael Nolan from comment #4)
> (In reply to Luke Kenneth Casson Leighton from comment #3)
> > next one, ROR? :)  or shall we leave that one to be a
> > micro-op, put data twice through the pipelines as a
> > FSM?  hmm, back to the other bugreport i think
> 
> ROR shouldn't be as common as SHL and SHR in normal code right? I think
> doing it in microcode would be fine, at least for the first iteration.

If we do it as microcode, we should try to have it still be a constant-time
operation, since it's commonly assumed to be constant-time by crypto code.

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