[libre-riscv-dev] [Bug 178] first coriolis2 tutorial, workflow and "test project" page

[bugzilla-daemon at libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=178

--- Comment #117 from Jean-Paul.Chaput at lip6.fr ---
(In reply to Luke Kenneth Casson Leighton from comment #114)
> Created attachment 25 [details]
> snx core block layout
> 
> oo, oo, really exciting, got it to produce some output and
> added new pins to it on the SOUTH side - inst bus (16 pins)
> 
> tried to add them on NORTH however the router said "nope, NET
> not close enough".

  Yes, the pads must be more or less in front of the side of the
  chip, not too much in the corners.

> wooow i'm so haaappy :)

  Now, at least, you can make nice postcards ;-)

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