[libre-riscv-dev] DDR PHY

Staf Verhaegen staf at fibraservi.eu
Mon Feb 24 11:20:16 GMT 2020

Luke Kenneth Casson Leighton schreef op ma 24-02-2020 om 08:23 [+0000]:

> > 
> > 
> > Would would be designing the PHY on chip?
> once the target geometry and Foundry is known, SymbioticEDA can do a layout
> for around EUR 600,000 (last time i checked).
> that is as a *libre* designed PHY where unlike normal PHY licensing from
> proprietary companies you pay once per geometry per foundry chip per 32 bit
> interface, for SymbioticEDA we would pay once per geometry per foundry.
> it'll take around 12 man months.

Problem is that foundry NDA may still interfere on how open the design
can be. For example TSMC NDA does not allow to share the final GDS of
the design to any third party without written approval of TSMC.
I think most foundries have similar constraints as it is possible to
derive design rules from the final GDS layout.


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