[libre-riscv-dev] [Bug 178] first coriolis2 tutorial, workflow and "test project" page

[bugzilla-daemon at libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=178

--- Comment #43 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jean-Paul.Chaput from comment #42)
> Hello Tobias,
> 
> As I'm not the one managing that repository I cannot tell why, but it also
> seems to me that it is incomplete.

run mksyms.sh in the cwd. i don't like adding duplicate copies of files.  the
only reason mk itself is not a symlink ia because you were developing an
alternative synthesis-yosys.mk 

> Nevertheless, I did put in alliance-check-toolkit/benchs/nmigen/alu_hier
> an example taken from there that should work (you will have to pull the
> latest commit).

yes that one works, it is test_part_sig.py that goes haywire.

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