[libre-riscv-dev] next tasks

Lauri Kasanen cand at gmx.com
Thu Feb 20 07:34:32 GMT 2020

On Wed, 19 Feb 2020 12:56:39 -0800
Jacob Lifshay <programmerjake at gmail.com> wrote:

> On Wed, Feb 19, 2020, 12:26 Luke Kenneth Casson Leighton <lkcl at lkcl.net>
> wrote:
> > more than happy with that, staf: i did want to ask you if you wanted
> > to include a basic core anyway on the design (i favour the Motorola
> > 68000) because we need some sort of "boot and power management core".
> I'd recommend something other than the MC68000 that has much wider compiler
> support (at least both modern versions of llvm and gcc) as well as a less
> unusual ISA. (address registers -- need I say more?)
> Also, supporting 64-bit pointers allows sharing address space with the main
> processors (more important than the other concerns).
> If we don't need any custom extensions, maybe just pick a RV64IMAC core
> since the ISA is simple, there's tons of available implementations if we
> don't want to build our own, and so we can reduce ISA proliferation on the
> SoC that way?

m68k is supported in the latest gcc, I wouldn't add llvm as a req. (I
code for the Sega Genesis occasionally, containing a m68k).

However may I suggest the POWER MicroWatt core?
Open license, written in VHDL, rough complexity when compiled for a
fpga 11k luts, 4k ffs.

It doesn't matter much what arch the boot processor is, whatever is
freely and easily available. Could be Z80 or 6502 even.

- Lauri

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