[libre-riscv-dev] Vulkanizing

Jacob Lifshay programmerjake at gmail.com
Wed Feb 19 07:12:10 GMT 2020


On Tue, Feb 18, 2020, 22:49 Luke Kenneth Casson Leighton <lkcl at lkcl.net>
wrote:

> On Wednesday, February 19, 2020, Jacob Lifshay <programmerjake at gmail.com>
> wrote:
>
> > That is 8 flops/core/cycle of fp32, 16 for fp16, and, depending
> > on how we implement it, either 2 or 4 flops/core/cycle of fp64.
>
> 2 because ... no 4 if you count FMAC as 2, and we can do 2 per clock @ 64
> bit.
>
> the odd ALU will do 2FMAC FLOPS @ 64 bit, the even likewise.
>

The idea was that we could have the 128-bit ALU do 2xfp64 or, since fp64 is
much less important and takes lots of area, just 1xfp64.

Jacob

>


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