[libre-riscv-dev] Reference OS

[Veera]

On Wed, Feb 19, 2020 at 04:37:35AM +0000, Luke Kenneth Casson Leighton wrote:
> On Wednesday, February 19, 2020, Veera <vklr at vkten.in> wrote:
> 
> > From previous list discussions, i think the cpu side is RISC-V and
> > VPU/GPU side is to be OPENPOWER based.
> 
> no.  dual ISA where RV is userspace only.
> 
> l.
> 

Yes dual ISA. What I stated is old way of things.
Central Processing Unit (CPU)(chip) having ALU, FPU and IO functions.
VPU/GPU being in a discrete chip.
So I said cpu side and vpu/gpu side as it should not be said chips.

If we are on it, one clarification I want; rv instructions can be used
from asm, can vpu/gpu instructions can also be used(mixed) in asm?
Thought it would be so.
When I was reading docs/list I did not gave deep thought on it, as I only
wanted rough idea.

Regards,
Veera