[libre-riscv-dev] Reference OS

Veera vklr at vkten.in
Wed Feb 19 02:54:37 GMT 2020

On Wed, Feb 19, 2020 at 02:48:13AM +0000, Immanuel, Yehowshua U wrote:
> Yeah. Last I heard its some RISC like  Michroarchitecture.
> At the flip of a bit, we can switch between POWER and RISCV on top of the michroarchitecture.

>From previous list discussions, i think the cpu side is RISC-V and
VPU/GPU side is to be OPENPOWER based.


> @Luke?
> Care to comment?

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