[libre-riscv-dev] [Bug 173] dynamic partitioned "shift"

[bugzilla-daemon at libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=173

--- Comment #14 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Michael Nolan from comment #13)
> Looks like either a0faa5a or 6527ad39 made the problem slightly worse:
>    Number of wires:               8866
> 
> the previous commit, bdca76073 had ~1k less gates:
>    Number of wires:               7893

we need to get rid of the switch statement.  we can't possibly have
a Mux-cascade of 64 Muxes, the gate latency will kill any possibility
of the chip running over about... 200 mhz.

i've just done the other three tables in
https://libre-riscv.org/3d_gpu/architecture/dynamic_simd/shift/
and the pattern is beginning to emerge.

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