[libre-riscv-dev] [Bug 172] partitioned signal add/sub/neg
bugzilla-daemon at libre-riscv.org
bugzilla-daemon at libre-riscv.org
Mon Feb 10 17:46:37 GMT 2020
http://bugs.libre-riscv.org/show_bug.cgi?id=172
--- Comment #3 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Michael Nolan from comment #2)
> I think I have sub, neg, and carry out working now
(confirmed here the unit test runs. a good TODO would be
a formal unit test however we need to do the MoU for that)
niice, it looks like...
+ bit_set = int(math.log2(lsb))
+ carry_result |= c << int(bit_set/4)
yeah, then tested that... excccellent, muahahah.
of course (sigh) now eeeverything has to have carry in it, but hey :)
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