[libre-riscv-dev] Routing a first nmigen disign with Corilis

[Luke Kenneth Casson Leighton]

On Mon, Feb 10, 2020 at 3:44 PM Tobias Platen
<tobias8202 at platen-software.de> wrote:
>
> I have read the documentaion of corilis2, and now I want to route a first simple design.
> Yosys and the blif format have been mentioned, so I guess exporting verilog from nmigen,
> then running yosys to convert the verilog to blif. Then read the netlist into corilis2,
> map to cells from the target technology.

all of these *should* be done as python programs (or Makefiles) -
coriolis2 P&R *is* an *actual* python program, which must be written.

without working worked examples on *exactly* how that is done - in
full - which actually work and complete (without modifications) 100%
successfully, we are completely lost.

at the moment we do not have *any* idea, jean-paul of where to look
for such examples, or where tutorials containing how to set up such
examples exist.

l.