[libre-riscv-dev] partitioned compare and mux

Michael Nolan mtnolan2640 at gmail.com
Fri Feb 7 21:17:43 GMT 2020


Luke Kenneth Casson Leighton <lkcl at lkcl.net> writes:
>>
>> My point is that subtract and negate are kind-of special cases of
>> addition, it seems better to generalize all the way to add with
>> carry-in/out and then build a PartitionedAddSub built around the
>> extended PartitionedAdder that does the carry-in (with it optional for
>> borrow-in)

I agree, this makes more sense than a separate subtractor. I need to
check this for POWER, but I remember the PowerPC has a true carry bit,
so a subtract with borrow is exactly the same as an add with carry,
except that the B (actually A, because it only has a "subtract from")
input is inverted.

>
>
> we're going to need this for Power, they have carry in and out
>
> so would that make sense to be just two bits extra, one at the LSB, one at
> the MSB?
>
> the A being Cat(0, actual_a, carryin) err maybe the other way round
> (carryin, actual_a, 0)
>
> and the B being (0, actual_b, 0)
>
> then the output is result[1:-2] and the carryout us result[-1]
>
> something like that?
>

Are these extra bits on the input? Carry_in is going to need to get
propagated (or not, depending on the partition bits) to each partiton of
the adder in order to do subtraction properly. It makes sense to me to
have it as a separate input bit (or bit vector if we wanted to be fancy
I guess).

I think it should be possible to exploit the existing mechanism for
carries in the partition to generate the carry in signal, by setting the
extra bits A and B when the partition is closed. This would generate a
carry into the next bit.

>> and per-element selectable b inversion. yosys would just
>> simplify the resulting gates (a trivial transformation of ~0 xor b to
>> ~b) for cases where it always subtracts.
>
>
> ok so a selectable Const from the constructor, you mean?  do we need a
> "dynamic" add/sub or is it enough to have something that generates optimal
> static code

Optimal static code I think would be ok, yosys can optimize out the
unused inputs and gates

--Michael



More information about the libre-riscv-dev mailing list