[libre-riscv-dev] [Bug 132] SIMD-like nmigen signal for partitioning

[bugzilla-daemon at libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=132

--- Comment #46 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
michael a quick test added to this file:
"ieee754/part_cmp/eq_gt_ge.py"

shows that the output order is inverted compared to what
test_partsig is expecting.

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