[libre-riscv-dev] PowerISA, NLNet grants
Samuel Falvo II
sam.falvo at gmail.com
Mon Feb 3 19:45:19 GMT 2020
On Mon, Feb 3, 2020 at 10:58 AM Luke Kenneth Casson Leighton <lkcl at lkcl.net>
> > And, the RISC-V Foundation can do nothing to stop me, because officially,
> > on paper, I'm not a RISC-V product.
> as long as you are not commercial, yes.
> sue you for trademark infringement if you use RISC-V in your product,
I'm *not* saying I'm using RISC-V. I'm saying that I am compatible with
their standards, but I'm not RISC-V.
so use the phrase "V-CSIR RV64I compatible" instead :)
I don't even do that. I say that I provide support for the RV64I
instruction set and a proper subset of the privilege specifications. Other
ISA extensions might be coming in the future; but on the whole, my
processor is the 530x0 family of processors. The 530x0 is RISC-V
compatible, but not conformant, in exactly the same sort of way that Compaq
machines were IBM compatible, but not IBM clones or certified.
Samuel A. Falvo II
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