[libre-riscv-dev] [OpenPOWER-HDL-Cores] microwatt feature request: "switch off all optimisations" mode
benh at amazon.com
Mon Aug 3 01:13:55 BST 2020
On Sat, 2020-08-01 at 14:55 +0100, Luke Kenneth Casson Leighton wrote:
> On Friday, July 31, 2020, Luke Kenneth Casson Leighton <lkcl at lkcl.net
> > wrote:
> > what would you suggest here? how can we "single-step" microwatt?
> > clearly performance is not important: cycle-accurate comparisons is
> > the goal.
> i since realised that the DMI interface serves this purpose, and
> investigated core_debug.vhdl
> with a little bit (or a lot) of futzing about with a FSM i should be
> able to run a single instruction then cycle through all of the GPRs,
> PC and MSR, dumping them out.
> by implementing the same interface in libresoc i can do a cycle by
> cycle comparison and find the discrepancies.
> it would be particularly useful to be able to get at the SPRs and the
> CR as well, this way.
> is there a standard for DMI address bus locations?
Not really... I just made it all up :-)
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