[libre-riscv-dev] daily kan-ban update 03aug2020

[Luke Kenneth Casson Leighton]

tasks:

*
https://bugs.libre-soc.org/showdependencytree.cgi?id=383&maxdepth=1&hide_resolved=1

today:

* nmigen IRC meeting (in 15 mins)
* linked DMI interface to core and got reset, start and stop working.

i need to test single-step as well as add regfile reading and being able to
get MSR and the PC.

at that point i can modify the litex sim.py to put either core in
singlestep mode and dump out registers and the PC, sequentially.

l.



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crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68