[libre-riscv-dev] [Bug 196] Formal correctness proof needed for the IEEE754 FPU

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=196
Bug 196 depends on bug 162, which changed state.

Bug 162 Summary: Formally Verify the FSGNJ module
https://bugs.libre-soc.org/show_bug.cgi?id=162

           What    |Removed                     |Added
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             Status|CONFIRMED                   |RESOLVED
         Resolution|---                         |FIXED

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