[libre-riscv-dev] [Bug 276] SR NAND Latch needed in nmigen

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=276

--- Comment #15 from whitequark at whitequark.org ---
Cxxrtl is upstream in Yosys, including SR latch support.

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