[libre-riscv-dev] [Bug 278] POWER v3.0B spec ambiguity on EXTS and missing EXTZ

bugzilla-daemon at libre-riscv.org bugzilla-daemon at libre-riscv.org
Sun Apr 5 19:46:37 BST 2020


--- Comment #4 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #3)
> (In reply to Luke Kenneth Casson Leighton from comment #2)
> > (In reply to Jacob Lifshay from comment #1)
> > > You don't need an infinite number of hardware bits to represent the
> > > mathematical integer, since you know the exact range the values fall in so
> > > you can calculate exactly how many bits you need, sign/zero-extending as
> > > needed when converting back to a bitstring.
> > 
> > if it's ok i'd like to go with "EXTS returns bitsize of 256" and see how
> > that goes, because string-to-int comes with a performance penalty.
> Basically all that's needed is to create a new type with the original bits
> and record if it's sign or zero extended, no Python strings need to be
> created or processed. 

oh ok - a different type, rather than an "actual python string".

or, a flag (in the SelectableInt) would do as well.  it's... slightly
better than overloading the meaning "bitlen=256".

> nmigen's simulator uses python longs internally to represent the value of a
> Signal, so it shouldn't be that much slower.

what i mean is... hmmm it's been a long time since i looked at the code:
i believe they use an int (long) for when numbers fit into a long, and
a different type - which takes far more time - when numbers go beyond
2^64.  this in the actual interpreter source code.

therefore, you won't know it, but if you use numbers greater than size 2^64
the interpreter slows down slightly.

i could be wrong about that, it's been a while since i looked at the
python interpreter source code.

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