[libre-riscv-dev] [Bug 139] Add LD.X and ST.X? Strided

bugzilla-daemon at libre-riscv.org bugzilla-daemon at libre-riscv.org
Wed Oct 9 10:31:26 BST 2019


--- Comment #60 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #58)
> > it doesn't trigger because of being the right register, but because 
> > jumps aren't valid inside VBLOCK. 
> oh, duh :)  oh wait...
> > This requires VBLOCK encoding exactly which instructions are inside 
> > and not (which I recall it doing).
> yes.
> ok, JAL _is_ valid... as long as it's to *outside* the memory
> area covered by the VBLOCK.  jumping to the *start* of the VBLOCK
> is permitted.
> likewise for BEQ (etc)

If BEQ is used as a vector compare-to-mask, it might be worthwhile to support
branches as long as they branch to the next instruction. Different immediates
could still be used to encode other instructions though.

On the other hand, I think having a separate compare-to-mask instruction
(instead of repurposing BEQ) would be worthwhile, since we could use R-type
instructions instead of B-type, allowing the compiler to greatly simplify
register allocation. Also, that would avoid needlessly triggering the branch
predictor, allowing for possible power savings.

We could additionally have a RMW on rd for compare, allowing simpler mask

rd |= rs1 < rs2 where rs1 and rs2 are vectors

we could also support &=, ^=, and plain assignment.

Some of those ops are redundant with predicated compare, can weed those out

You are receiving this mail because:
You are on the CC list for the bug.

More information about the libre-riscv-dev mailing list