[libre-riscv-dev] [Bug 139] Add LD.X and ST.X? Strided

[bugzilla-daemon at libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=139

--- Comment #35 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #34)

> I do think we shouldn't have ignore, because that increases the number of
> registers that need to be read for both swizzle and swizzle2 (need to read
> dest reg to combine values except in special circumstances) and swizzle2 (2
> source swizzle, not swizzle with destsubvl=2) provides the functionality we
> need.

i'm not able to say because i really do not understand how swizzle2 works.
i've spent several days researching it and simply cannot find anything,
not even based on the hints of swizzle2 being in LLVM IR.

can you please describe it in pseudocode in a simple loop?

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