[libre-riscv-dev] Dromajo RISC-V simulator designed for rtl cosimulation

[Luke Kenneth Casson Leighton]

On Tue, Nov 19, 2019 at 3:03 AM Jacob Lifshay <programmerjake at gmail.com> wrote:
>
> https://github.com/chipsalliance/dromajo

interesting.  i _think_ what they're saying is that you can take a
software-snapshot (at a critical debug point) then transfer that over
to a *hardware* simulation and see what's going on, only having to run
a few cycles to get to the "interesting" bit.

l.