[libre-riscv-dev] [Bug 147] New: sv2nmigen now converts module headers

[bugzilla-daemon at libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=147

            Bug ID: 147
           Summary: sv2nmigen now converts module headers
           Product: Libre Shakti M-Class
           Version: unspecified
          Hardware: Other
                OS: Linux
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: Source Code
          Assignee: lkcl at lkcl.net
          Reporter: hacks2019 at platen-software.de
                CC: libre-riscv-dev at lists.libre-riscv.org
        Depends on: 72
   NLnet milestone: ---

I've added basic missing features to sv2nmigen so that system verilog module
headers get now converted to nmigen automatically. It also outputs python
comments for code that does not automatically converted yet.


Referenced Bugs:

http://bugs.libre-riscv.org/show_bug.cgi?id=72
[Bug 72] verilog to nmigen converter (full or partial) needed
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