[libre-riscv-dev] KCP53000B micro-architecture thoughts

[Luke Kenneth Casson Leighton]

On Friday, May 31, 2019, Samuel Falvo II <sam.falvo at gmail.com> wrote:

> On Thu, May 30, 2019 at 11:22 AM Jacob Lifshay <programmerjake at gmail.com>
> wrote:
> > I'd recommend having the additional add/sub unit combined with the branch
> > unit since all compares are sub & check top 2 bits of result & check
> carry
> > out & check if result (without carry out) is zero.
>
> An interesting take; of course, it could be the case that ADDs and
> SUBs can go to either unit, giving me effectively two ADD/SUB units to
> play with, basically for free.


That would give the full 3 cycle coverage. Yay.

Btw you do NOT need branch speculation in an OoO design. This is a common
misunderstanding.

However once you have shadowing, branch speculation is so easy and the
performance gain so high that almost nobody doesn't add it.

It will cost gates so for tight FPGA fit may be an option.

L.



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