[libre-riscv-dev] [Bug 44] IEEE754 FPU inverse-sqrt

[bugzilla-daemon at libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=44

--- Comment #17 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #16)
> (In reply to Jacob Lifshay from comment #15)
> > (In reply to Luke Kenneth Casson Leighton from comment #14)
> > > looking at the diagram from ep08-21.pdf on page 36 (figure 3.15)
> > > 
> > > * q[j+1] in radix 2 is a 2-bit signed binary number, -1 0 or +1
> > >   (top of p35), in binary -1 = 0b10, 0 = 0b00, 1 = 0b01
> > shouldn't that be -1 = 0b11 assuming it's in 2s complement?
> 
> err... the paper does say -1, 0 or +1 (as does Tanako), this will need
> to be checked.
yeah, it is -1, 0, or 1. I had meant that -1 in 2s complement is 0b11, not
0b10.

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