[libre-riscv-dev] chinese sponsor, looking to design an ECP5-based dev board

[Luke Kenneth Casson Leighton]

we appear to be extremely lucky, i am talking to a chinese sponsor,
who would like to use the Libre RISC-V SoC when it is ready.  they
would like to speed up our development cycle, and i said that a good
way to do that would be to make a dual (or even triple) ECP5 PCB with
1GB or 2GB of LPDDR3 RAM and back-to-back connections between the
FPGAs.

this would allow us to use one of the FPGAs as a "peripheral" chip and
the other(s) as the main CPU.

we do have the option to connect 2x or more of these together,
back-to-back, and to create some sort of inter-chip bus that would
allow us to break the 85k LUT limit of the ECP5.  so i wanted to know
what people think, here, should i ask them if they could do 2x or 3x
ECP5s on a single PCB?   even digikey's pricing for the 85k LUTs
LFE5UM is under $40...

i also asked if they could put a SATA connector, PCIe, and GbE on it,
and it does look like it's possible to do HDMI (actually, DVI) as
well:
https://github.com/daveshah1/prjtrellis-dvi/tree/1080p_2

thoughts appreciated, particularly if people believe this may be a
saleable product (nothing to do with the Libre RISCV SoC itself)

l.