[libre-riscv-dev] Introduction
Luke Kenneth Casson Leighton
lkcl at lkcl.net
Thu May 2 18:38:45 BST 2019
thanks, sam, for the info.
btw just so everyone knows, default for this list is "reply to list"
(rather than reply to sender), i must alter that if possible so it's
"reply to all". until then (or if you subscribe to the list, samuel),
do remember to cc his email address (manually and/or use
"reply-to-all").
sam, i have pointed people here at the work that you've done, a few
times, we particularly liked the auto-generator (the one written in
lisp that spews out verilog): we're a mixture of hardware-software
engineers here so "tools that save coding or auto-generate code" are
aaallways appreciated.
the inclusion of formal proof unit testing even for things as basic as
the MStatus CSR - as separate and distinct from *additional* unit
tests - particularly caught my attention, and, overall is why i
invited you to see if you'd like to participate.
thanks to the NLnet Foundation (and one other sponsor, being
negotiated) there is an actual budget for completion of tasks (note:
*completion* of tasks, hence the need to subdivide tasks - to a sane
granularity - in the bugtracker).
the project has a charter, we do make an effort to honour it :)
https://libre-riscv.org/charter/discussion/
l.
On Thu, May 2, 2019 at 6:18 PM Jacob Lifshay <programmerjake at gmail.com> wrote:
>
> Glad to have you participate!
>
> Jacob Lifshay
>
> On Thu, May 2, 2019, 10:14 Samuel Falvo II <sam.falvo at gmail.com> wrote:
>
> > Hello everyone. In part to ensure this list address is embedded in my
> > GMail address book, and to let others know who I am, I thought I'd write a
> > quick introduction.
> >
> > My name is Samuel A. Falvo II, though online I also go by kc5tja or
> > Vertigo, depending on which social medium service you happen to be using.
> >
> > I am working on the Kestrel Computer Project [1], which is my attempt to
> > build a fully open-source computer using FPGA technology. My goal is to
> > make a computer which, to the greatest extent that I can, approximates the
> > user experience of a Commodore 64 or similar machine, but with contemporary
> > parts. You might occasionally hear reference to a neologism I coined to
> > describe this idea, a "neoretro" computer.
> >
> > The above-linked site is a great introduction to the project, but it's
> > dated, and I haven't bothered to update it in years. For more recent
> > information, software, and hardware files related to the latest incarnation
> > of the concept, the Kestrel-3, please see [2]. I also maintain a
> > not-as-frequently-updated project page at Hackaday.io [3].
> >
> > Prior to the Kestrel-3 kick-off, I had completed a predecessor computer
> > design called the Kestrel-2DX[4]. This was a refinement of a still earlier
> > project, the Kestrel-2 (sources for this are in the github repo), but with
> > my first home-brew RISC-V processor design, the KCP53000. This CPU was
> > originally intended to be used with the Kestrel-3, but there were a number
> > of problems with it that I am not comfortable with going forward, so for
> > the Kestrel-3, I'm redesigning it, this time using nmigen and formal
> > verification, two decisions that I've been extremely happy with so far.
> > This will be called the KCP53000B design.
> >
> > The KCP53000B is currently MPLv2 licensed, but I've discussed with Luke the
> > possibility of re-licensing it. I was originally going to go with GPLv3,
> > but Luke made some persuasive arguments that I should consider LGPLv2
> > instead.
> >
> > Right now, due to my work schedule, I spend an average of about three hours
> > per week working on the Kestrel, but it's typically bursty. I'll not have
> > the energy to work on it for weeks at a time, and then one fateful week,
> > I'll spend Friday, Saturday, and Sunday just banging out code. And then
> > I'll be burnt out again for the next couple of weeks, and the cycle
> > continues. ;)
> >
> > Anyway, that's a little bit about me. I look forward to collaborating in
> > any meaningful way that I can, time constraints permitting. Thank you Luke
> > for inviting me to join this list.
> >
> > ________
> > 1. http://kestrelcomputer.github.io/kestrel/
> > 2. http://chiselapp.com/user/kc5tja/repository/kestrel-3/index
> > 3. https://hackaday.io/project/10035-kestrel-computer-project
> > 4. https://chiselapp.com/user/kc5tja/repository/kestrel-2dx/index
> > --
> > Samuel A. Falvo II
> > _______________________________________________
> > libre-riscv-dev mailing list
> > libre-riscv-dev at lists.libre-riscv.org
> > http://lists.libre-riscv.org/mailman/listinfo/libre-riscv-dev
> >
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