[libre-riscv-dev] Wish to work on
Rishabh Jain
rishucoding at gmail.com
Mon Mar 25 10:26:00 GMT 2019
I think, the table got messed up!
Here's the table in plain text.
I3 I2 I1 I0 | O1 O0 V
0 0 0 0 | x x 0
x x x 1 | 0 0 1
x x 1 0 | 0 1 1
x 1 0 0 | 1 0 1
1 0 0 0 | 1 1 1
On Mon, Mar 25, 2019 at 3:45 PM Rishabh Jain <rishucoding at gmail.com> wrote:
> I am sorry for being unresponsive and inactive for past 2 weeks, was busy
> in my cousin's marriage and a small urgent work.
>
> So, I started following the AddressEncoder file; generated the waveforms
> and was able to understand many things. But have a few queries :
> 1. in TLB/test/test_address_encoder.py : we have passed width as 4 but we
> are specifying our in_val "like :in_val = 0b001 " in 3 bits only. Shouldn't
> the correct way be
> *in_val = 0b0001 ? *
> 2. In TLB/src/AddressEncoder.py, I didn't understood the meaning of
> output: It says "The output line will always have the lowest value address
> output". So: does it mean we are following a priority table like this? :
> I3 I2 I1 I0 O1 O0 V
> 0 0 0 0 x x 0
> x
> x
> x
> 1 0 0 1
> x
> x
> 1 0
> 0 1 1
> x
> 1 0
> 0
> 1 0 1
> 1 0
> 0
> 0
> 1 1 1
>
> Let's say we have 4 inputs, 2 outputs and one valid bit: lowest number is
> given highest priority. So, if input is 0b1010, then output is 01.
> Also, I think this idea follows with the testing snippets in test bench.
> Right?
>
> 3. "The output is valid when either single or multiple match is
> high.Otherwise the output is zero. " Do we have only one output variable
> "o"? In one case, output can be 0 for let's say an input = 0b0001.
> I am not able to follow, which output does this line talk for "Otherwise
> the output is zero. ". Shouldn't we have an explicit valid bit; separate
> from output bits?
>
> 4. Not able to understand this snippet:
>
> 48 with
> m.If(self.p_encoder.n):
> 49 m.d.comb +=
> [
> 50
> self.single_match.eq(0),
> 51
> self.multiple_match.eq(0),
> 52
> self.o.eq(0)
> 53 ]
>
> Also, what does the variable 'n' do? [From the waveforms, it seems to me
> as a valid bit ,but quite confused here :( ]
>
>
More information about the libre-riscv-dev
mailing list