[libre-riscv-dev] buffered pipeline
Luke Kenneth Casson Leighton
lkcl at lkcl.net
Tue Mar 19 05:42:50 GMT 2019
(jacob please do trim replies, like i've done below
https://en.wikipedia.org/wiki/Posting_style#Trimming_and_reformatting
)
On Tue, Mar 19, 2019 at 5:32 AM Jacob Lifshay <programmerjake at gmail.com> wrote:
> > *AND*... i just took a look at dsl/rec.py - Record has an eq
> > function, because it derives from Value! so, it will be possible to
> > use a Record instance as an input (or output) stage, and pass *that*
> > into eq as *well*.
> >
> Record.eq is not supported by Simulator.
that's a pain. thanks, saved me some effort. i'll see if i can get
eq() to recognise / support them, as i think it will be valuable.
can i ask you a favour, could you raise a bugreport on m-labs
tracker, that Record.eq doesn't work in the simulation?
l.
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