[libre-riscv-dev] buffered pipeline

Jacob Lifshay programmerjake at gmail.com
Mon Mar 18 22:10:25 GMT 2019


accidentally got the connections backward in connect(). Fixed in quoted
version

On Mon, Mar 18, 2019 at 3:06 PM Jacob Lifshay <programmerjake at gmail.com>
wrote:

> One thing I noticed in your implementation is that IOAckIn has all the
> inputs and IOAckOut has all the outputs. I personally think IOAck is not an
> appropriate name since none of the signals are named ack anymore.
> Additionally, I would organize the signals into a group from/to the prev
> stage and a group from/to the next stage.
>
> Example:
> class PredControl:
>     """control signals connected from the current pipeline stage to the
>     preceding stage
>
>     Attributes:
>     -----------
>     valid : in
>         Asserted by the preceding pipeline stage when it has data that
> will be
>         ready to transfer by the next clock edge, including when ``ready``
> is
>         deasserted.
>     ready : out
>         Asserted by this pipeline stage when it can accept data at the next
>         clock edge, including when ``valid`` is deasserted.
>     """
>
>     def __init__(self):
>         self.valid = Signal(1)
>         self.ready = Signal(1)
>
>     def connect(self, other: 'SuccControl', m: Module) -> None:
>         other.connect(self, m)
>
>
> class SuccControl:
>     """control signals connected from the current pipeline stage to the
>     succeeding stage
>
>     Attributes:
>     -----------
>     valid : out
>         Asserted by this pipeline stage when it has data that will be
> ready to
>         transfer by the next clock edge, including when ``ready`` is
>         deasserted.
>     ready : in
>         Asserted by the succeeding pipeline stage when it can accept data
> at
>         the next clock edge, including when ``valid`` is deasserted.
>     """
>
>     def __init__(self):
>         self.valid = Signal(1)
>         self.ready = Signal(1)
>
>     def connect(self, other: PredControl, m: Module) -> None:
>         m.d.comb += other.valid.eq(self.valid)
>         m.d.comb += self.ready.eq(other.ready)
>
>
>


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