[libre-riscv-dev] TLB Replacement Policy

[Luke Kenneth Casson Leighton]

https://www.bottomupcs.com/hardware_support_for_virtual_memory.xhtml

daniel, this article looks to be extremely insightful and useful.  i
note this comment:

It should be noted it is possible to operate with no hardware
page-table walker; in this case each TLB miss is resolved by the OS
and the processor becomes a software-loaded architecture. However, the
performance impact of disabling the HPW is so considerable it is very
unlikely any benefit could be gained from doing so

also, the paragraph after it says, "SF-VHPT is the default Hardware
Page Walk model used by Linux on Itanium", meaning that there *might*
be a *software* page-walk algorithm in there somewhere as well.

l.