[libre-riscv-dev] [isa-dev] FP reciprocal sqrt extension proposal
andrew at sifive.com
Fri Jul 12 09:47:40 BST 2019
On Fri, Jul 12, 2019 at 12:30 AM lkcl <luke.leighton at gmail.com> wrote:
> On Friday, July 12, 2019 at 5:09:47 AM UTC+8, andrew wrote:
> > It’s not straightforward to correctly implement sqrt(x) using something
> like sqrt(x+y), because the addition messes up the sign of zero for
> sqrt(-0). You’d need to use 2-3 instructions to get the IEEE 754-mandated
> value (load zero into y; copy the sign of x onto y; then perform sqrt(x+y)).
> Assuming this is isqrt rather than sqrt we are discussing.
> So what you are saying Andrew is that FP exceptions on the add part would
> make a hybrid operation much more complex. Two possible exceptions could
> occur, and I assume the same +/- zero issues arise?
Yeah, and though I was talking about sqrt rather than isqrt, similar issues
> FMUL on the other hand, exceptions etc. have been thought through and the
> add has not been problematic.
> With the possibility of a FP HW Exception extension to be created, it
> would be even more important to get this right.
> > So, in addition to being more complex to implement, it’s also a less
> useful instruction than plain-old sqrt.
> Isqrt. Definitely needed for 3D.
> Thank you for this insight Andrew it cuts off a lot of development time
> potentially expended unnecessarily.
> You received this message because you are subscribed to the Google Groups
> "RISC-V ISA Dev" group.
> To unsubscribe from this group and stop receiving emails from it, send an
> email to isa-dev+unsubscribe at groups.riscv.org.
> To view this discussion on the web visit
More information about the libre-riscv-dev