[libre-riscv-dev] [Bug 110] New: RISC-V FP Reciprocal (inverse) square root ISA extension needed

bugzilla-daemon at libre-riscv.org bugzilla-daemon at libre-riscv.org
Fri Jul 12 09:34:01 BST 2019


            Bug ID: 110
           Summary: RISC-V FP Reciprocal (inverse) square root ISA
                    extension needed
           Product: Libre Shakti M-Class
           Version: unspecified
          Hardware: Other
                OS: Linux
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: Specification
          Assignee: lkcl at lkcl.net
          Reporter: lkcl at lkcl.net
                CC: libre-riscv-dev at lists.libre-riscv.org
   NLnet milestone: ---


I propose a Zfrsqrt extension that consists of the frsqrt.s, frsqrt.d,
frsqrt.q, and frsqrt.h instructions, where the 32-bit, 64-bit,
128-bit, and 16-bit versions require the corresponding F, D, Q, etc.
If only the F and Zfrsqrt extensions are supported, then only the
frsqrt.s instruction is supported.
If only the F, D, and Zfrsqrt extensions are supported, then only the
frsqrt.s and the frsqrt.d instructions are supported. Likewise for
frsqrt.q and frsqrt.h requiring the corresponding extensions enabled.

The operation implemented by frsqrt.* is a correctly-rounded
implementation of the IEEE 754-2008 rSqrt operation, with all the
usual FP rounding modes supported.

For the encoding, I think using an encoding similar to both the
fsqrt.* and fdiv.* encodings is a good idea, since frsqrt is similar
to both fdiv and fsqrt; Therefore, as an initial proposal, I think
using a funct7 value of 0111100 and the rest of the instruction
identical to fsqrt is a good idea, since, as far as I'm aware, that
doesn't conflict with anything currently.

We (libre-riscv.org) are currently planning on implementing frsqrt in
our libre GPU, since frsqrt is a common operation in 3D graphics (used
for vector normalization, among other things).

Comments, modifications, etc. welcome.

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