[libre-riscv-dev] IEEE754 FVCT

Luke Kenneth Casson Leighton lkcl at lkcl.net
Mon Jul 8 11:04:17 BST 2019

ok i've managed to "extract" the generators from the test_*.py code,
am slowly morphing it to general-purpose use, ultimately to just be
able to pass in the bit-width (16/32/64), function to be performed
(add, mul, div), and how many tests to run.

i'm travelling to thailand tomorrow, will be sort-of online.


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